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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 9 of 9  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
R 2011-05-13
16:50
Kochi Kochi City Culture-Plaza Cul-Port Produce of Yield Analysis System at Semiconductor Manufacture Factory.
Shingo Himeno (Toshiba Oita Operations)
 [more]
ICD 2011-04-18
13:30
Hyogo Kobe University Takigawa Memorial Hall [Invited Talk] Technology Trend of NAND Flash Memories -- A 151mm2 64Gb 2b/cell NAND Flash Memory in 24nm CMOS Technology --
Koichi Fukuda, Yoshihisa Watanabe, Eiichi Makino, Koichi Kawakami, Junpei Sato, Teruo Takagiwa, Naoaki Kanagawa, Hitoshi Shiga, Naoya Tokiwa, Yoshihiko Shindo, Toshiaki Edahiro, Takeshi Ogawa, Makoto Iwai (Toshiba), Kiyofumi Sakurai (Toshiba Memory Systems), Toru Miwa (SanDisk) ICD2011-4
A 64Gbit 2bit/cell NAND flash memory capable of 14MB/s programming and 266MB/s data transfer is fabricated in 24nm techn... [more] ICD2011-4
pp.19-26
SDM 2008-10-10
15:45
Miyagi Tohoku Univ. Influence of B and P dopants on SiO2 film characteristics
Satoshi Nagashima, Hiroshi Akahori (Toshiba) SDM2008-166
In general, the silicon material that has doped impurities such as phosphorus, boron, and arsenic to the diffusion and t... [more] SDM2008-166
pp.63-68
CPM, ICD 2008-01-18
14:55
Tokyo Kikai-Shinko-Kaikan Bldg Chip Thinning Technologies Realizing High Chip Strength
Shinya Takyu, Tetsuya Kurosawa, Noriko Shimizu, Susumu Harada (Toshiba Co.) CPM2007-145 ICD2007-156
Accompanying the rapid progress of the digital network information society, there is strong demand for high functionalit... [more] CPM2007-145 ICD2007-156
pp.99-103
MW, ED 2007-01-19
15:50
Tokyo Kikai-Shinko-Kaikan Bldg. High Voltage and High Frequency( over10MHz) Class-E Power-Supplies Using a GaN-HEMT
Wataru Saito (Toshiba Semiconductor), Tomokazu Domon, Kunio Tsuda (Toshiba R & D Center), Ichiro Omura (Toshiba Semiconductor)
GaN-HEMTs can realize high-voltage and ultra-low on-resistance due to high critical electric field and high electron mob... [more] ED2006-237 MW2006-190
pp.205-208
ICD, SDM 2006-08-18
11:40
Hokkaido Hokkaido University Embedded Bulk FinFET SRAM Cell Technology with Planar FET Peripheral Circuit for hp32 nm node and beyond
Hirohisa Kawasaki (TAEC), Satoshi Inaba, Kimitoshi Okano, Akio Kaneko (Toshiba Semicon.), Atsushi Yagishita (TAEC), Takashi Izumida, Takahisa Kanemura, Takahiko Sasaki, Nobuaki Otsuka, Nobutoshi Aoki, Kyoichi Suguro, Kazuhiro Eguchi, Yoshitaka Tsunashima (Toshiba Semicon.), Kazunari Ishimaru (TAEC), Hidemi Ishiuchi (Toshiba Semicon.)
 [more] SDM2006-147 ICD2006-101
pp.127-132
ICD, SDM 2005-08-19
10:45
Hokkaido HAKODATE KOKUSAI HOTEL HfSiON Gate Dielectrics Design for Mixed Signal CMOS
Kenji Kojima, Ryosuke Iijima, Tatsuya Ohguro, Takeshi Watanabe, Mariko Takayanagi, Hisayo S. Momose, Kazunari Ishimaru, Hidemi Ishiuchi (TOSHIBA)
(Advance abstract in Japanese is available) [more] SDM2005-147 ICD2005-86
pp.25-30
ICD, SDM 2005-08-19
14:40
Hokkaido HAKODATE KOKUSAI HOTEL Robust Device Design in FinFET SRAM for hp22nm Technology Node
Kimitoshi Okano, Tatsuya Ishida, Takahiko Sasaki, Takashi Izumida, Masaki Kondo, Makoto Fujiwara, Nobutoshi Aoki, Satoshi Inaba, Nobuaki Otsuka, Kazunari Ishimaru, Hidemi Ishiuchi (Toshiba)
Feasibility of FinFET SRAM operation at hp22nm technology node has been studied by device and circuit simulation from th... [more] SDM2005-154 ICD2005-93
pp.67-72
ICD 2005-04-14
11:40
Fukuoka   A 128Mb DRAM Using a 1T Gain Cell(FBC) on SOI
Takashi Ohsawa, Katsuyuki Fujita, Kosuke Hatsuda (Toshiba), Tomoki Higashi (Toshiba Microelectronics), Mutsuo Morikado, Yoshihiro Minami, Tomoaki Shino, Hiroomi Nakajima, Kazumi Inoh, Takeshi Hamamoto, Shigeyoshi Watanabe (Toshiba)
We report on a 128Mbit DRAM design using the capacitor-less DRAM cell or the floating body cell(FBC) on SOI. The cell of... [more] ICD2005-5
pp.23-28
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